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Every Printed Circuit Board (PCB) needs to be checked for manufacturing faults. There are various methods available to test
both bare boards and loaded boards.
To reduce cost and aid assembly, PCB's must be free of shorts and opens before assembly begins.
Testing of plated through hole (PTH) PCB's presented relatively few problems. Testing could be accomplished by providing a
test probe at each hole, with all circuitry being tested from one side.
Using the PCB drill files, fixture plates are drilled to take the probes in a pattern which matches the holes on the PCB.
The use of flexible probes enables the fixture to be used as an interface between the standard grid of the test machine and
the PCB. The test machine is usually programmed from a "golden" or known good board. If no golden board exists, a batch of
PCB's can only be compared for identical characteristics. Common faults could go undetected. Advanced, integrated test systems
overcome these problems.
Generally there are 4 methods to test and check bare boards:
- Contact test methods:
- Non contact methods:
Such systems are made up of four parts:
Pre-process system
CNC drilling machine
Test System
Fault finding system
The Pre-Process system generates CNC Drill data to build test fixtures, Netlists for 100% testing of PCB's and data
for the Fault Finding Station. Using Gerber data supplied by the PCB Designer, the system extracts both SMD and PTH test
points producing a drill file for each plate in a fixture. The Netlist relates directly to the fixture. PCB's can then be
tested to the netlist. Defects are reported and detailed information is stored for reference as an Error File. PCB's can be
PTH, SMT or mixed technology on one or both sides. SMD pitches down to 0.5mm or 0.020 inches or less can be tested on two sides
simultaneously.
The summarised capabilities:
Testing to known good board or netlist
Analyse and create netlist for PCB's up to 24 layers
High complexity designs
Fine Pitch SMD to 0.5mm pitch and below
High volume work
Fault Finding capability for Netlist Testing
Simultaneous Double Sided Testing
In some cases, eg very fine pitch surface mount designs, the bed-of-nail test method has geometric limitations. In such
case a Fixtureless Flying Probe Test can be suitable. One or more test probes are robotically moved over the board and
probed on the various locations. No dedicated test fixture is needed since the test equipment can be programmed to test
any board lay-out.
The summarised capabilities:
Netlist Testing
Analyse and create netlist for PCB's up to 24 layers
High complexity designs
Fine Pitch SMD to 0.25mm pitch and below
Low volume work
High speed discharge test
Ball Grid Array
Fault Finding capability for Netlist Testing
Automatic Optical Inspection (AOI) or non-contact testing is a tool using laser or reflective technologies to inspect inner
layer circuitry prior to bonding in the multi-layer process. It has not enjoyed a good reputation for performing a useful
function on outer layer images.
The reasoning behind this is that the majority of AOI has been developed for inner layer inspection only. Inner layers
differ from outer layers not only in the fact that they have holes drilled in them, but that the circuit patterns present on
many outer layers have conductors whose shape and appearance confuse the fault detection logic of many AOI systems.
AOI machines can be broken down into three elements, those being:
Optical scanning
Application of fault detection algorithms
Fault reporting
Whilst the optical scanning is a tried and tested part of all the AOI systems, it is the application of the fault detection
algorithms used by any particular system that largely determines its efficiency and bottom line performance. Many AOI systems
use a picture comparison technique, or a design rule technique to determine faults present on panels, whilst others prefer to
use morphological reference, that is one that depends on the shape of conductors or rather the mis-shape to detect faults.
It is these very same algorithms that set the machines apart, that actually restrict their outer layer usage. Picture comparison
machines become limited because they work by detecting differences between a 'perfect image' and the scanned mage; but in real
life,
there are so many differences from panel to panel that are part of the process, that real defects become hard to determine.
As far as morphological systems are concerned, contemporary outer layer circuits contain the most diverse range of conductor
shapes and either confuse the fault detection algorithm or require extensive 'workarounds' that their use is severely restricted.
You only have to look at the long set-up and high use of don't inspect areas' to see how limited some systems are on outer layers.
There is the process of Automatic Optical Test (AOT) which is available for scanning any type of layer produced in a pcb.
It has been used for many years for inner and outer layers, but its true potential is only recently being realized as more and
more pcb's are not able to be tested 100%. It is imperative to state that this process is not put forward to replace any form
of electrical test, but it can certainly complement test at many stages where it becomes difficult or impossible. The full AOT
process would involve the optical test of all layers including the outer layers at their relevant stages of production. So how
does AOT differ from AOI ?
The three key stages are still present, namely:
Optical scanning
Application of fault detection algorithms (connectivity based)
Fault reporting
The key difference between AOI and AOT is that the fault detection algorithms for AOT are based on the connectivity of the
pcb and not any other graphical or shape related property of the pcb. The AOT systems can optically scan using either white
light and advanced line-scan CCD electronic cameras or alternatively using laser and CCD cameras. Developments in recent times
in the image quality gained by CCD camera systems has meant that the images gained from pcbs under optical test tend very much
towards a 100% representation of that pcb. It is of paramount importance to this approach of fault finding on pcbs that a good
working image is obtained. After obtaining the image of the pcb for fault analysis, a simple, but powerful set of detection
algorithms based on the pcb connectivity are employed to find critical faults on the pcb. The AOT method uses test points,
netlists and continuity just like any other test process, but it has powerful benefits.
Whereas test machines find opens and short circuits only, AOT system can analyse the circuit further and find image quality
defects such as conductor width and spacing faults; this will identify any latent faults present at the bare board stage.
Furthermore, the AOT approach does not require large amounts of time or resources in
terms of data preparation, it does not require a test fixture and it is possible to scan the most dense, complex circuit
image in only a few seconds; there are no limitations on circuit density to restrict performance.
It can be seen that there are many benefits of using AOT when compared to any other test method. If the manufacturer accepts
that the 'testing' part of the AOT is performed on an image of the pcb rather than with physical contact, then the results from
AOT should be at least as good as for non-contact testing.
A comparison of the benefits of AOT when compared to other test methods is shown in the figure below.
| Parameter |
Fixture testing | Moving probe testing |
Non-contact testing | AOT |
| Data generation | Good | Good | Good | Excellent |
| Fixture build | Time/money comsuming | Not applicable | Not applicable | Not applicable |
| machine setup | Good | Time consuming | Time consuming | Excellent |
| Test time | Fast | Slow | Slow | Very fast |
| Fault location and repair | Mediocre | Mediocre | Mediocre | Excellent |
| Accuracy of process | Good | Good | Good | Good |
| Fualt types detected | Open/shorts | Open/shorts | Open/shorts | Open/shorts conductor width and spacing |
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